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VN610SP-E
SINGLE CHANNEL HIGH SIDE DRIVER
Table 1. General Features
Type VN610SP-E RDS(on) 10 m
Figure 1. Package
Iout
45 A
VCC
36 V
s OUTPUT s
CURRENT: 45 A
CMOS COMPATIBLE INPUT s PROPORTIONAL LOAD CURRENT SENSE
s
UNDERVOLTAGE AND OVERVOLTAGEn
10
SHUT-DOWN s OVERVOLTAGE CLAMP THERMAL SHUT DOWN s CURRENT LIMITATION s VERY LOW STAND-BY POWER DISSIPATION s PROTECTION AGAINST: n LOSS OF GROUND AND LOSS OF VCC s REVERSE BATTERY PROTECTION (*) s IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE
s
1
PowerSO-10TM
DESCRIPTION The VN610SP-E is a monolithic device made using STMicroelectronics VIPower M0-3 technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active V CC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).
This device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio). Active current limitation combined with thermal shut-down and automatic restart protect the device against overload. Device automatically turns off in case of ground pin disconnection.
Table 2. Order Codes
Package PowerSO-10TM
Note: (*) See application schematic at page 9
Tube VN610SP-E
Tape and Reel VN610SPTR-E
Rev. 1 October 2004 1/18
VN610SP-E
Figure 2. Block Diagram
VCC
VCC CLAMP
OVERVOLTAGE UNDERVOLTAGE PwCLAMP
DRIVER
OUTPUT ILIM VDSLIM IOUT K CURRENT SENSE
GND LOGIC INPUT
OVERTEMP.
Table 3. Absolute Maximum Ratings
Symbol VCC Parameter Value Unit
DC supply voltage Reverse DC supply voltage DC reverse ground pin current DC output current Reverse DC output current DC input current Current sense maximum voltage Electrostatic Discharge (Human Body Model: R=1.5K; C=100pF)
41 -0.3 -200 Internally limited -50 +/- 10 -3 +15
V V mA A A mA V V
-VCC - IGND IOUT - IOUT IIN VCSENSE
VESD
- INPUT - CURRENT SENSE - OUTPUT - VCC Maximum Switching Energy
4000 2000 5000 5000
V V V V
EMAX Ptot Tj Tc TSTG
(L=0.05mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=75A) Power dissipation at TC<25C Junction operating temperature Case operating temperature Storage temperature
193 139 Internally limited -40 to 150 -55 to 150
mJ W C C C
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VN610SP-E
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
GROUND INPUT C.SENSE N.C. N.C.
6 7 8 9 10 11 VCC
5 4 3 2 1
OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT
Connection / Pin Floating To Ground
Current Sense Through 1Kresistor
N.C. X X
Output X
Input X Through 10K resistor
Figure 4. Current and Voltage Conventions
IS VCC VF
VCC
IOUT OUTPUT IIN INPUT VIN CURRENT SENSE VSENSE GND IGND ISENSE VOUT
Table 4. Thermal Data
Symbol Rthj-case Rthj-amb Parameter Thermal resistance junction-case Thermal resistance junction-ambient (MAX) (MAX) Value 0.9 50.9 (1) 36(2) Unit C/W C/W C/W
Note: (1) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick). Note: (2) When mounted on a standard single-sided FR-4 board with 6 cm 2 of Cu (at least 35m thick).
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VN610SP-E
ELECTRICAL CHARACTERISTICS (8VSymbol VCC Parameter Test Conditions Min. Typ. Max. Unit
Operating supply voltage Undervoltage shutdown Overvoltage shutdown On state resistance Clamp Voltage (See Note 1) IOUT=15A; Tj=25C IOUT=15A; Tj=150C IOUT=9A; VCC=6V ICC=20 mA (see note 1) Off State; VCC=13V; VIN=VOUT=0V Off State; VCC=13V; VIN=VOUT=0V;
5.5 3 36
13 4
36 5.5
V V V
VUSD VOV RON Vclamp
10 20 35 41 48 10 10 55 25 20 5 0 -75 50 0 5 3
m m m V A A mA A A A A
IS
Supply current
Tj=25C
On State; VCC=13V; VIN=5V; IOUT=0A RSENSE=3.9K
IL(off1) IL(off2) IL(off3) IL(off4)
Off State Output Current Off State Output Current Off State Output Current Off State Output Current
VIN=VOUT=0V VIN=0V; VOUT =3.5V VIN=VOUT=0V; VCC=13V; Tj =125C VIN=VOUT=0V; VCC=13V; Tj =25C
Note: 1. Vclamp and VOV are correlated. Typical difference is 5V.
Table 6. Protection (see note 2)
Symbol Ilim TTSD TR THYST VDEMAG VON Parameter DC Short circuit current Thermal shutdown temperature Thermal reset temperature Thermal hysteresis Turn-off output voltage clamp Output voltage drop limitation IOUT =2A; VIN=0; L=6mH VCC=13V 5.5VIOUT =1.5A; Tj= -40C...+150C
Note: 2. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles
Table 7. VCC - Output Diode
Symbol VF Parameter Forward on Voltage Test Conditions -IOUT=8A; Tj=150C Min Typ Max 0.6 Unit V
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VN610SP-E
ELECTRICAL CHARACTERISTICS (continued) Table 8. Current Sense (9VVCC16V) (See Figure 5)
Symbol K1 dK1/K1 K2 dK2/K2 K3 dK3/K3 Parameter IOUT /ISENSE Current Sense Ratio Drift IOUT /ISENSE Current Sense Ratio Drift IOUT /ISENSE Current Sense Ratio Drift Test Conditions IOUT =1.5A; VSENSE=0.5V; Tj= -40C...150C IOUT =1.5A; VSENSE=0.5V; Tj= -40C...150C IOUT =15A; VSENSE=4V; Tj=-40C Tj=25C...150C IOUT =15A; VSENSE=4V; Tj=-40C Tj=25C...150C IOUT =45A; VSENSE=4V; Tj=-40C Tj=25C...150C IOUT =45A; VSENSE=4V; Tj=-40C Tj=25C...150C Vcc=6...16V; IOUT=0A; VSENSE=0V; Tj=40C...150C ISENSE0 Analog sense current Off State; VIN=0V On State; VIN=5V VSENSE Max analog sense output voltage VCC=5.5V; IOUT =7.5A; RSENSE=10K VCC >8V; IOUT=15A; RSENSE=10K 0 0 3.5 5 5.5 5 10 A A V V V Min 3300 -10 4200 4400 -6 4200 4400 -6 4900 4900 4900 4900 Typ 4400 Max 6000 +10 6000 5750 +6 5500 5250 +6 % % % Unit
VSENSEH
Analog sense output voltage in overtemperature VCC=13V; RSENSE=3.9K condition VCC=13V; Tj>TTSD; Output Open to 90% ISENSE (see note 3)
Analog sense output RVSENSEH impedance in overtemperature condition Current sense delay tDSENSE reponse
400 500
s
Note: 3. Current sense signal delay after positive input slope.
Table 9. Switching (V CC=13V)
Symbol td(on) td(off) Parameter Turn-on delay time Turn-off delay time Test Conditions RL=0.87 RL=0.87 RL=0.87 Min Typ 50 50 See relative diagram See (dVOUT/dt)off Turn-off voltage slope RL=0.87 relative diagram V/s Max Unit s s V/s
(dVOUT/dt)on Turn-on voltage slope
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VN610SP-E
Table 10. Logic Input
Symbol VIL IIL VIH IIH VI(hyst) VICL Parameter Test Conditions Input low level voltage Low level input current VIN=1.25V Input high level voltage High level input current VIN=3.25V Input hysteresis voltage IIN=1mA Input clamp voltage IIN=-1mA Min 1 3.25 10 0.5 6 6.8 -0.7 8 Typ Max 1.25 Unit V A V A V V V
Figure 5.
IOUT/ISENSE
6500 6000
max.Tj=-40C
5500 5000
max.Tj=25...150C
min.Tj=25...150C
typical value
4500 4000 3500 3000 0 5 10 15 20 25
IOUT
min.Tj=-40C
30
35
40
45
50
Table 11. Truth Table
CONDITIONS Normal operation Overtemperature Undervoltage Overvoltage INPUT L H L H L H L H L Short circuit to GND H H Short circuit to VCC Negative output voltage clamp L H L OUTPUT L H L L L L L L L L L H H L SENSE 0 Nominal 0 VSENSEH 0 0 0 0 0 (TjTTSD) VSENSEH 0 < Nominal 0
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VN610SP-E
Figure 6. Switching Characteristics (Resistive load RL=0.87)
VOUT
80% dVOUT/dt(on) tr ISENSE 90% 10%
90% dVOUT/dt(off) tf t
INPUT
tDSENSE
t td(off)
td(on)
t
Table 12. Electrical Transient Requirements On V CC Pin
ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2
I C C C C C C
IV C C C C C E
CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
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VN610SP-E
Figure 7. Waveforms
NORMAL OPERATION INPUT LOAD CURRENT SENSE CURRENT
UNDERVOLTAGE VCC INPUT LOAD CURRENT SENSE CURRENT
VUSD VUSDhyst
OVERVOLTAGE
VOV
VCC INPUT LOAD CURRENT SENSE
VCC > VUSD
VOVhyst
SHORT TO GROUND INPUT LOAD CURRENT LOAD VOLTAGE SENSE CURRENT
SHORT TO VCC INPUT LOAD VOLTAGE LOAD CURRENT SENSE CURRENT
OVERTEMPERATURE Tj INPUT LOAD CURRENT SENSE CURRENT
ISENSE=V SENSEH/(RSENSE+RSENSEH )
TTSD TR
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VN610SP-E
Figure 8. Application Schematic
+5V
Rprot INPUT
VCC
Dld C Rprot CURRENT SENSE RSENSE GND OUTPUT
VGND
RGND DGND
GND PROTECTION REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / (IS(on)max). 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT line is also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT pin is to leave it unconnected, while unused SENSE pin has to be connected to Ground pin.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table.
C I/Os PROTECTION:
If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k.
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VN610SP-E
Figure 9. Off State Output Current
IL(off1) (A)
9 8 7 6 5
Figure 10. High Level Input Current
Iih (uA)
5 4.5
Off state Vcc=36V Vin=Vout=0V
Vin=3.25V
4 3.5 3 2.5
4
2
3 2 1 0 -50 -25 0 25 50 75 100 125 150 175
1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Figure 11. Input Low Level
Vil (V)
2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 -50 -25 0 25 50 75 100 125 150 175
Figure 13. Input High Level
Vih (V)
3.6 3.4 3.2 3 2.8 2.6 2.4 2.2 2 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Figure 12. Input Clamp Voltage
Vicl (V)
8 7.8
Figure 14. Input Hysteresis Voltage
Vhyst (V)
1.5 1.4
Iin=1mA
7.6 7.4 7.2 7 6.8 6.6 6.4 6.2 6 -50 -25 0 25 50 75 100 125 150 175
1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
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VN610SP-E
Figure 15. Overvoltage Shutdown
Vov (V)
50 48 46
120
Figure 18. ILIM Vs Tcase
Ilim (A)
160 140
Vcc=13V
44 42 40 38 36
40 100 80 60
34 32 30 -50 -25 0 25 50 75 100 125 150 175
20 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Figure 16. Turn-on Voltage Slope
dVout/dt(on) (V/ms)
700 650 600 550 500 450
Figure 19. Turn-off Voltage Slope
dVout/dt(off) (V/ms)
900 800 700 600 500 400
Vcc=13V Rl=0.87Ohm
Vcc=13V Rl=0.87Ohm
400 300 350 200 300 100 250 -50 -25 0 25 50 75 100 125 150 175 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Figure 17. On State Resistance Vs Tcase
Ron (mOhm)
25 22.5 20 17.5 15 12.5 10 7.5 5 2.5 0 -50 -25 0 25 50 75 100 125 150 175
Figure 20. On State Resistance Vs VCC
Ron (mOhm)
25 22.5
Iout=15A Vcc=8V; 36V
Iout=15A
20
Tc= 125C
17.5 15 12.5 10 7.5 5 2.5 0 5 10 15 20 25 30 35 40
Tc= 25C Tc= - 40C
Tc (C)
Vcc (V)
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VN610SP-E
Figure 21. Maximum turn off current versus load inductance
ILMAX (A) 1000
100
A
10
C
B
1 0.01
0.1
1 L(mH )
10
100
A = Single Pulse at TJstart=150C B= Repetitive pulse at T Jstart=100C C= Repetitive Pulse at T Jstart=125C Conditions: VCC=13.5V
Values are generated with R L=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C.
VIN, IL Demagnetization Demagnetization Demagnetization
t
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VN610SP-E
PowerSO-10TM Thermal Data Figure 22. PowerSO-10TM PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: from minimum pad lay-out to 8cm2).
Figure 23. Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (C/W)
55
Tj-Tamb=50C
50 45 40 35 30
0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
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VN610SP-E
Figure 24. PowerSO-10 Thermal Impedance Junction Ambient Single Pulse
ZTH (C/W) 100
Footprint 6 cm2
10
1
0.1
0.01 0.0001
0.0 01
0.01
0.1 1 Time (s)
10
100
1000
Figure 25. Thermal fitting model of a double channel HSD in PowerSO-10
Pulse calculation formula
Z TH = R TH + Z THtp ( 1 - )
where
= tp T
Table 13. Thermal Parameter
Tj_1
Pd1 C1 C2 C1 C2 C3 C4 C5 C6
R1
R2
R3
R4
R5
R6
Tj_2
R1 Pd2
R2
T_amb
Area/island (cm2) R1 (C/W) R2 (C/W) R3( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
Footprint 0.05 0.3 0.3 0.8 12 37 0.001 5.00E-03 0.02 0.3 0.75 3
6
22
5
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VN610SP-E
PACKAGE MECHANICAL Table 14. PowerSO-10TM Mechanical Data
Symbol A A (*) A1 B B (*) C C (*) D D1 E E2 E2 (*) E4 E4 (*) e F F (*) H H (*) h L L (*) a (*)
Note: (*) Muar only POA P013P
millimeters Min 3.35 3.4 0.00 0.40 0.37 0.35 0.23 9.40 7.40 9.30 7.20 7.30 5.90 5.90 1.27 1.25 1.20 13.80 13.85 0.50 1.20 0.80 0 2 1.80 1.10 8 8 1.35 1.40 14.40 14.35 Typ Max 3.65 3.6 0.10 0.60 0.53 0.55 0.32 9.60 7.60 9.50 7.60 7.50 6.10 6.30
Figure 26. PowerSO-10TM Package Dimensions
B
0.10 A B
10
H
E
E2
E4
1
SEATING PLANE e
0.25
B
DETAIL "A"
A
C D = D1 = = = SEATING PLANE
h
A F A1
A1
L DETAIL "A"
P095A
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VN610SP-E
Figure 27. PowerSO-10TM Suggested Pad Layout and Tube Shipment (no suffix)
14.6 - 14.9 10.8 - 11 6.30
A A C C
CASABLANCA
B
MUAR
0.67 - 0.73 1 2 3 4 5 10 9 8 7 6 0.54 - 0.6
B
9.5
All dimensions are in mm.
1.27
Base Q.ty Bulk Q.ty Tube length ( 0.5) Casablanca Muar 50 50 1000 1000 532 532
A
B
C ( 0.1) 0.8 0.8
10.4 16.4 4.9 17.2
Figure 28. Tape And Reel Shipment (suffix "TR") REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 600 600 330 1.5 13 20.2 24.4 60 30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 24 4 24 1.5 1.5 11.5 6.5 2
End
All dimensions are in mm.
Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components
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VN610SP-E
REVISION HISTORY
Date Oct. 2004 Revision 1 - First Issue. Description of Changes
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VN610SP-E
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
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